I'm Stan, an undergraduate/graduate student at Stanford studying Electrical Engineering. I believe that giving designers better EDA tools will give them the ability to explore more complex designs with less effort; therefore, giving rise to more performant, power efficient, and cost effective silicon. I take great pride in my work, and I'm always looking to solve the industry's toughest problems.
Experience
Silimate (YC S23)
Founding Engineer | September 2025 - Present
Silimate is the copilot for chip designers.
Apple Inc.
CAD Intern, Top-level Physical Design | June 2025 - September 2025
Performed analysis for potential flow improvements and developed tooling to assist design teams.
Silimate (YC S23)
Software Intern | October 2024 - May 2025
Worked directly under the CEO/CTO to assist in critical infrastructure projects and customer-requested features.
Stanford Department of Electrical Engineering
Research Intern, Robust Systems Group | June 2024 - August 2024
Worked on next-generation augmented reality (AR) accelerators after selection to the 2024 EE REU Program.
Relevant Coursework
CME 100 - Vector Calculus for Engineers
CME 102 - Ordinary Differential Equations for Engineers
CS 103 - Mathematical Foundations of Computing
CS 106A - Programming Methodology
CS 106B - Programming Abstractions
CS 107 - Computer Organization and Systems
CS 109 - Introduction to Probability for Computer Scientists
CS 111 - Operating Systems Principles
CS 143 - Compilers
CS 161 - Design and Analysis of Algorithms
EE 64 - Mechanical Prototyping for Electrical Engineers
EE 65 - Modern Physics for Engineers
EE 101A - Circuits I
EE 108 - Digital System Design
EE 180 - Digital Systems Architecture
EE 271 - Introduction to VLSI Systems
EE 272 - Design Projects in VLSI Systems I
EE 292A - Electronic Design Automation (EDA) and Machine Learning Hardware
